1. Field of the Invention
The invention relates to a semiconductor device and a method of fabricating the same, and more particularly to a semiconductor device having a cavity therein, such as a flip-chip type semiconductor device, and a method of fabricating the same.
2. Description of the Related Art
A semiconductor package comprised of a substrate composed of organic material and a semiconductor chip flip-chip-mounted on the substrate generally has a cavity inside thereof.
FIGS. 1A to 1C illustrate a conventional semiconductor device. FIG. 1A is a top view of the semiconductor device with a cover taken away, FIG. 1B is a cross-sectional view taken along the line IBxe2x80x94IB in FIG. 1A, and FIG. 1C is a cross-sectional view taken along the line ICxe2x80x94IC in FIG. 1A.
The illustrated conventional semiconductor device is comprised of a square substrate 2, a square semiconductor chip 4 mounted centrally on the substrate 2, a wall 3 having a cross-section of a hollow square pole and mounted on edges of the substrate 2 so that the semiconductor chip 4 is surrounded by the wall 3, a square cover 8 covering the wall 3 therewith, first adhesive 7 adhering the cover 8 to the wall 3 and also adhering the wall 3 to the substrate 2, second adhesive 5 applied between the semiconductor chip 4 and a lower surface of the cover 8 for radiating heat therethrough, and a plurality of spherical solder balls 9 arranged on a lower surface of the substrate 2.
The cover 8 has almost the same area as an area of the substrate 2. The semiconductor chip 4 has a projected area smaller than an area of the cover 8. The wall 3 has four sides each of which is equal in length to each of sides of the substrate 2, and is coextensive with the substrate 2.
The substrate 2 may be comprised of a film or may have a multi-layered structure composed of organic material. The wall 3 is composed of copper. The cover 8 is composed of a material having a high thermal conductivity, such as copper, aluminum, silicon carbide, and aluminum nitride. The first adhesive is composed of epoxy having a low coefficient of water absorption, cyanate ester, or polyolefin.
Pads (not illustrated) formed on the substrate 2 make contact with bumps (not illustrated) formed at a surface of the semiconductor chip 4 to thereby ensure electrical connection between the substrate 2 and the semiconductor chip 4. The wall 3 is mounted on the substrate 2 in order to enhance mechanical strength of the semiconductor device. The wall 3 is adhered to the substrate 2 through the first adhesive 7 without a gap. The cover 8 is adhered to the wall 3 through the first adhesive 7 in an opposite side of the substrate 2.
The second adhesive 5 is applied between an upper surface of the semiconductor chip 4 and a lower surface of the cover 8 to thereby hermetically adhere the semiconductor chip 4 to the cover 8 without any gap. The solder balls 9 are equally spaced from one another on a lower surface of the substrate 2.
The conventional semiconductor device having the above-mentioned structure is accompanied with a problem that since there is a difference in a thermal expansion coefficient between silicon of which the semiconductor chip 4 is composed and organic material of which the substrate 2 is composed, the substrate 2 is deformed in an annealing step to be carried out after flip-chip mounting of the semiconductor chip 4 onto the substrate 2, resulting in that solder connection is peeled off, or that the semiconductor chip 4 is peeled off the substrate 2, as illustrated in FIGS. 2A and 2B.
In order to solve this problem, an attempt has been made to introduce underfilling resin between the semiconductor chip 4 and the substrate 2, and then, cure the underfilling resin. This attempt ensures enhancement in strength around bumps, and provides resistance to deformation to the substrate 2.
FIGS. 3A to 3G are cross-sectional views of a conventional semiconductor device in which a semiconductor chip is fixed on a substrate through underfilling resin. Hereinbelow is explained the method of fabricating such a semiconductor chip, with reference to FIGS. 3A to 3G.
First, as illustrated in FIG. 3A, there is prepared the substrate 2.
Then, as illustrated in FIG. 3B, the wall 3 having a cross-section of a hollow square pole is fixed on the substrate through the first adhesive 7.
Then, as illustrated in FIG. 3C, the semiconductor chip 4 is electrically connected to the substrate 2 by causing pads (not illustrated) of the substrate 2 to make contact with bumps (not illustrated) of the semiconductor chip 4. Then, a product resulting from the step illustrated in FIG. 3C is washed with flux.
Then, as illustrated in FIG. 3D, underfilling resin 6 is coated between the substrate 2 and the semiconductor chip 4, and then, heated. As a result, the underfilling resin 6 is cured and thus adhered to both the substrate 2 and the semiconductor chip 4.
Then, the second adhesive 5 for radiating heat therethrough is applied onto an upper surface of the semiconductor chip 4. Then, the cover 8 is put on the wall 3, as illustrated in FIG. 3E. Since the first adhesive 7 is applied to a lower surface of the cover 8 at a peripheral area thereof, the cover 8 is adhered to the wall 3. Then, the semiconductor device is heated. As a result, the first adhesive 7 is cured, and accordingly, the wall 3 is fixed to both the substrate 2 and the cover 8.
Then, the semiconductor device is turned upside down, and thereafter, the solder balls 9 are adhered to a lower surface of the substrate 2 by means of a jig 11. The solder balls 9 are vacuum-sucked to the jig 11, and the solder balls 9 are mounted onto a lower surface of the substrate 2 at a time, as illustrated in FIG. 3F.
Then, a product resulting from the step illustrated in FIG. 3F is washed with flux. Thus, the semiconductor device as illustrated in FIG. 3G is completed.
The semiconductor device illustrated in FIG. 3G has the same structure as the structure of the semiconductor device illustrated in FIGS. 1A to 1C except addition of the underfilling resin 6. The underfilling resin 6 is liquid resin containing epoxy, cyanate ester or polyolefin as a main constituent.
In the process of fabricating the semiconductor device illustrated in FIGS. 3A to 3G, annealing steps are carried out twice, one for curing the underfilling resin 6 in the step illustrated in FIG. 3D, and the other for curing the second adhesive 7 in the step illustrated in FIG. 3E. In addition, three annealing steps are carried out each for aging, baking and mounting the semiconductor device on a printed wiring board, after the semiconductor device has been completed. Those annealing steps are carried out at a temperature of about 125, 125 and 230 degrees centigrade, respectively.
Though the above-mentioned problem of deformation of the substrate 2 is caused even in the annealing steps to be carried out after the semiconductor device has been completed, the addition of the underfilling resin 6 can prevent occurrence of the problem.
However, after the underfilling resin 6 has been cured, the underfilling resin 6 contracts, causing another problem that the substrate 2 is made bent, and the semiconductor chip 4 is cracked.
Japanese Unexamined Patent Publication No. 11-204552 published on Jul. 30, 1999 has suggested a solution to this problem. Specifically, Japanese Unexamined Patent Publication No. 11-204552 has suggested a semiconductor device including an underfilling resin coated between a printed wiring board and a semiconductor chip, and adhesive partially coated onto the semiconductor chip for radiating heat therethrough. The underfilling resin and the adhesive are to be concurrently cured. As a result, even if stresses are generated due to contraction of the resin, those stresses are cancelled each other and relaxed, preventing the semiconductor device from being made bent or deformed.
The semiconductor device suggested in Japanese Unexamined Patent Publication No. 11-204552 has the same structure as the structure of the semiconductor device illustrated in FIG. 3G.
Though Japanese Unexamined Patent Publication No. 11-204552 is explained herein, it should be noted that the applicant does not admit that the Publication constitutes prior art under any provisions in 35 U.S.C. The Publication is explained only for the purpose of better understanding of the present invention.
A method of fabricating the semiconductor device is explained hereinbelow with reference to FIGS. 4A and 4B.
First, similarly to the method having been explained with reference to FIGS. 3A to 3G, the underfilling resin 6 is applied between the substrate 2 and the semiconductor chip 4, as illustrated in FIG. 4A. At this stage, the underfilling resin 6 is not cured yet.
Then, the solder balls 9 are adhered onto a lower surface of the substrate 2, as illustrated in FIG. 4B.
Then, the semiconductor device is annealed for the first time to thereby concurrently cure the underfilling resin 6 and the adhesive 5. By concurrently curing the underfilling resin 6 and the adhesive 5, even if stresses are generated due to contraction of the resin 6, those stresses are cancelled each other and relaxed, preventing the semiconductor device from being made bent or deformed.
However, air enclosed in a cavity 1 defined by the substrate 2, the wall 3 and the cover 8 expands in volume due to the annealing, resulting in generation of stresses in the semiconductor device. Such stresses cause many problems that the substrate 2 is destroyed, the adhesive 5 is peeled off, and the underfilling resin 6 peels off the semiconductor chip 4.
In order to solve this problem, Japanese Unexamined Patent Publication No. 11-204552 also suggests a semiconductor device and a method of fabricating the same, in which adhesive composed of organic material in liquid or in the form of a sheet is applied between the cover and the wall, and the adhesive is patterned such that there is formed a hole through which air passes, after adhesion of the cover and the wall. According to the Publication, the semiconductor device solves the above-mentioned problems of destruction of the substrate 2, peel-off of the adhesive 5, and peel-off of the underfilling resin 6 from the semiconductor chip 4, all caused by internal stresses which are generated due to expansion of air in the cavity 1.
FIGS. 6A to 5C illustrate the suggested semiconductor device. FIG. 5A is a top view of the semiconductor device with the cover taken away, FIG. 5B is a cross-sectional view taken along the line VBxe2x80x94VB in FIG. 1A, and FIG. 5C is a cross-sectional view taken along the line VCxe2x80x94VC in FIG. 5A.
In the semiconductor device, the adhesive 7 is not applied in a certain region onto an upper surface of the wall 3. For instance, the adhesive 7 is not applied at four corners 101 in an upper surface of the wall 3, as illustrated in FIG. 5A. The suggested semiconductor device has the same structure as the structure of the semiconductor device illustrated in FIG. 3G.
According to Japanese Unexamined Patent Publication No. 11-204552, the regions 101 in which the adhesive 7 is not applied can prevent the above-mentioned problems caused by expansion of air enclosed in the cavity 1.
However, the formation of the regions 101 causes another problem. That is, when the semiconductor device is washed with flux, flux enters the semiconductor device through the regions 101 in which the adhesive 7 is not applied. If the semiconductor device is insufficiently washed with pure water, flux remains residual in the semiconductor device. The residual flux causes electric leakage, electromigration and other problems, resulting in deterioration in reliability of the semiconductor device.
Even after the semiconductor device is completed, moisture enter the semiconductor device through the regions 101, in which case, the moisture is mixed with the residual flux to thereby cause problems such as electric leakage ad electromigration.
In addition, the underfilling resin 6 absorbs the moisture, resulting in that the semiconductor device is expanded in an annealing step, which is called xe2x80x9cpopcornxe2x80x9d phenomenon, and hence, the underfilling resin 6 is peeled off the semiconductor chip 4.
In view of the above-mentioned problems, it is an object of the present invention to provide a semiconductor device having a cavity therein, such as a flip-chip type semiconductor device, which is capable of preventing electric leakage and electromigration, and also preventing occurrence of xe2x80x9cpopcornxe2x80x9d phenomenon which might occur in an annealing step.
It is also an object of the present invention to provide a method of fabricating such a semiconductor device.
In one aspect of the present invention, there is provided a semiconductor device including (a) a substrate, (b) a semiconductor chip mounted on the substrate, (c) a wall having a closed cross-section and mounted on the substrate such that the semiconductor chip is surrounded by the wall, and (d) a cover covering the wall therewith so that a closed cavity is defined by the substrate, the wall and the cover, the cavity being designed to be under such a pressure that a predetermined difference between pressures inside and outside the cavity is accomplished at a predetermined temperature.
A force exerting on the semiconductor device varies due to a difference between pressures inside and outside the cavity. In addition, a volume of gas passage through the cavity also varies in dependence on the force. Hence, the predetermined pressure is determined experimentally or based on simulation, in order to control both the force exerting on the semiconductor device and gas passage through the cavity.
For instance, if the cavity is rendered under a pressure higher than an external pressure, a difference between a pressure in the cavity and an external pressure would prevent external air containing moisture from entering the semiconductor device, ensuring that electrical connections in the semiconductor device are kept away from moisture, dust and other foreign materials.
As an alternative, if the cavity is rendered under a pressure lower than an external pressure, it would be possible to prevent deformation of the substrate due to an increase in pressure in the cavity, resulted from an increase in temperature in an annealing step.
As a result, it would be possible to prevent electric leakage and electromigration, and also prevent occurrence of xe2x80x9cpopcornxe2x80x9d phenomenon which might occur in an annealing step.
There is further provided a semiconductor device including (a) a substrate, (b) a semiconductor chip mounted on the substrate, (c) a wall having a closed cross-section and mounted on the substrate such that the semiconductor chip is surrounded by the wall, and (d) a cover covering the wall therewith so that a closed cavity is defined by the substrate, the wall and the cover, the cavity being designed to be under a pressure almost equal to an atmospheric pressure at a temperature highest in both steps of fabricating the semiconductor device and steps expectable after the semiconductor device is completed.
By rendering the cavity under the above-mentioned pressure, it would be possible to prevent deformation of the substrate due to an increase in pressure in the cavity, resulted from an increase in temperature in an annealing step.
It is preferable that the wall and/or the cover are/is formed with at least one through-hole through which a pressure in the cavity can be adjusted, and that the semiconductor device further includes a plug clogging the through-hole therewith.
For instance, the plug may be composed of thermosetting resin.
It is preferable that the plug is composed of a material which is not deformed in a temperature range of a room temperature to a temperature highest in both steps of fabricating the semiconductor device and steps expectable after the semiconductor device is completed.
By composing the adhesive of such a material, it would be possible to prevent gas passage between the cavity and outside of the semiconductor device while the semiconductor device is being fabricated, and even after the semiconductor device is completed.
It is preferable that at least one through-hole through which a pressure in the cavity can be adjusted is formed between the substrate and the wall, and that the semiconductor device further includes first adhesive clogging the through-hole therewith.
It is preferable that the semiconductor device further includes second adhesive through which the wall is adhered to the substrate, the second adhesive being not applied in at least one region between the substrate and the wall. The region defines the through-hole.
It is preferable that the adhesive is softened when heated.
By softening the adhesive, it would be possible to reduce a difference between a pressure in the cavity and an external pressure.
It is preferable that at least one through-hole through which a pressure in the cavity can be adjusted is formed between the wall and the cover, and that the semiconductor device further includes third adhesive clogging the through-hole therewith.
It is preferable that the semiconductor device further includes fourth adhesive through which the cover is adhered to the wall, the fourth adhesive being not applied in at least one region between the wall and the cover. The region defines the through-hole.
There is still further provided a semiconductor device including (a) a substrate, (b) a semiconductor chip mounted on the substrate, (c) a wall having a closed cross-section and mounted on the substrate such that the semiconductor chip is surrounded by the wall, and (d) a cover covering the wall therewith so that a closed cavity is defined by the substrate, the wall and the cover, at least one of the wall and the cover being formed with at least one through-hole through which a pressure in the cavity can be adjusted, and (e) a device for clogging the through-hole therewith and attenuating a difference in pressure between the cavity and an atmospheric pressure.
For instance, the device is comprised of a thin film, in which case, it is preferable that the film sags so that a volume of the cavity can be varied.
It is preferable that the film is composed of metal.
By composing the film of metal, the film could have a resistance to fluctuation in pressure and temperature while the semiconductor device is being fabricated and even after the semiconductor device is completed. In addition, the film is not likely to be corroded.
There is yet further provided a semiconductor device including (a) a substrate, (b) a semiconductor chip mounted on the substrate, (c) a wall having a closed cross-section and mounted on the substrate such that the semiconductor chip is surrounded by the wall, and (d) a cover covering the wall therewith so that a closed cavity is defined by the substrate, the wall and the cover, the cavity being designed to be under a pressure higher than an external pressure.
By rendering the cavity under a pressure higher than an external pressure, a difference between a pressure in the cavity and an external pressure would prevent external air containing moisture from entering the semiconductor device, ensuring that electrical connections in the semiconductor device are kept away from moisture, dust and other foreign materials. As a result, it would be possible to prevent electric leakage and electromigration, and also prevent occurrence of xe2x80x9cpopcornxe2x80x9d phenomenon which might occur in an annealing step.
There is still yet further provided a semiconductor device including (a) a substrate, (b) a semiconductor chip mounted on the substrate, (c) a wall having a closed cross-section and mounted on the substrate such that the semiconductor chip is surrounded by the wall, and (d) a cover covering the wall therewith so that a closed cavity is defined by the substrate, the wall and the cover, the cavity being designed to be under a pressure lower than an external pressure.
By rendering the cavity under a pressure lower than an external pressure, it would be possible to prevent deformation of the substrate due to an increase in pressure in the cavity, resulted from an increase in temperature in an annealing step. As a result, it would be possible to prevent electric leakage and electromigration, and also prevent occurrence of xe2x80x9cpopcornxe2x80x9d phenomenon which might occur in an annealing step.
In another aspect of the present invention, there is provided a method of fabricating a semiconductor device, including the steps of (a) mounting both a semiconductor chip and a wall having a closed cross-section on a substrate such that the semiconductor chip is surrounded by the wall, and (b) covering the wall with a cover so that a closed cavity defined by the substrate, the wall and the cover is under a pressure almost equal to an atmospheric pressure at a temperature highest in both steps of fabricating the semiconductor device and steps expectable after the semiconductor device is completed.
It is preferable that the wall is covered with the cover in the step (b) in an enclosure which is kept at the pressure.
For instance, the step (b) may be comprised of (b1) adjusting a pressure in the cavity through at least one through-hole formed through at least one of the wall and the cover, and (b2) clogging the through-hole with adhesive.
As an alternative, the step (b) may be comprised of (b1) adjusting a pressure in the cavity through at least one through-hole formed between the substrate and the wall, and (b2) clogging the through-hole with adhesive.
It is preferable that the method further includes the step of applying second adhesive between the substrate and the wall to thereby adhere the wall to the substrate such that the second adhesive is not applied in at least one region which defines the through-hole.
For instance, the step (b) may be comprised of (b1) adjusting a pressure in the cavity through at least one through-hole formed between the wall and the cover, and (b2) clogging the through-hole with adhesive.
It is preferable that the method further includes the step of applying fourth adhesive between the wall and the cover to thereby adhere the cover to the wall such that the fourth adhesive is not applied in at least one region which defines the through-hole.
There is further provided a method of fabricating a semiconductor device, including the steps of (a) mounting both a semiconductor chip and a wall having a closed cross-section on a substrate such that the semiconductor chip is surrounded by the wall, (b) covering the wall with a cover so that a closed cavity is defined by the substrate, the wall and the cover, (c) adjusting a pressure in the cavity through at least one through-hole formed through at least one of the wall and the cover so that the pressure is almost equal to an atmospheric pressure at a temperature highest in both steps of fabricating the semiconductor device and steps expectable after the semiconductor device is completed, and (d) clogging the through-hole with a thin film.
It is preferable that the thin film is caused to sag when the through-hole is clogged with the thin film.
There is still further provided a method of fabricating a semiconductor device, including the steps of (a) mounting both a semiconductor chip and a wall having a closed cross-section on a substrate such that the semiconductor chip is surrounded by the wall, and (b) covering the wall with a cover so that a closed cavity defined by the substrate, the wall and the cover is under a pressure higher than an external pressure.
There is still further provided a method of fabricating a semiconductor device, including the steps of (a) mounting both a semiconductor chip and a wall having a closed cross-section on a substrate such that the semiconductor chip is surrounded by the wall, and (b) covering the wall with a cover so that a closed cavity defined by the substrate, the wall and the cover is under a pressure lower than an external pressure.
In still another aspect of the present invention, there is provided a nozzle used for a semiconductor device including (a) a substrate, (b) a semiconductor chip mounted on the substrate, (c) a wall having a closed cross-section and mounted on the substrate such that the semiconductor chip is surrounded by the wall, and (d) a cover covering the wall therewith so that a closed cavity is defined by the substrate, the wall and the cover, at least one of the wall and the cover being formed with at least one through-hole through which a pressure in the cavity can be adjusted, the nozzle being capable of absorbing the cover to thereby move the semiconductor device, adjusting a pressure in the cavity to a desired pressure through the through-hole, and clogging the through-hole with a plug with air being disallowed to pass through the through-hole.
For instance, the nozzle may be comprised of a hollow cylinder, a rod slidable in the cylinder, and a plug sucked to the rod at a distal end thereof.
The above and other objects and advantageous features of the present invention will be made apparent from the following description made with reference to the accompanying drawings, in which like reference characters designate the same or similar parts throughout the drawings.